Cheap voltage doubler

Figure 1 shows a circuit diagram of the cheap and simple voltage doubler. This circuit provides an output current of 2 A. The oscillator of this DC to DC converter is based on the Schmitt trigger (DD1.1) with the feedback network (R1, R2, C1). The frequency of the oscillator is about 7 kHz (F=0.7/(R2C1)).

The signals from the oscillator is fed in opposite phases to the inputs of the logic gates DD1.3 and DD1.4. The two power transistors VT1 and VT2 are connected to the outputs of this logic gates. To prevent the possibility of short circuiting of the power supply while switching the power transistors, the delayed signal goes to the second inputs of the logic gates DD1.3 (through an inverter DD1.2) and DD1.4. The delay is about 1/4 of a period, it is performed by an RC network R3C2. Because of this, the pulses of a negative polarity on the bases of the transistors VT1, VT2 are separated in time and there is no through current in the circuit (see fig. 2).

DC to DC voltage doubler circuit diagram

Fig. 1. A simple DC to DC converter.
DD1 - CD4093; VT1, VT2 - TIP126; VD1, VD2 - 1N5400.

If the transistor VT2 is turned on, the capacitor C3 is charged through the diode VD1 to the power supply voltage. After that, half a period later, the transistor VT1 is turned on, and the capacitor C3 will be connected in series with the supply voltage, and then the capacitor C4 will be charged through the diode VD2 to almost twice the supply voltage.

Waveforms of the DC to DC converter

Fig. 2. The waveforms of outputs of the logic gates DD1.3, DD1.4, DD1.1.

To smooth out voltage pulses at maximum load current it is better to increase the capacitance of the capacitors C3, C4 to 10μF, and connect across the capacitor C4 a film or ceramic capacitor of 0.1...1 μF.

Stephenson P. Cheap voltage doubler.- Wireless World. 1983, Vol, 89, № 1573, p.59.

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