Digital frequency multiplier

This digital circuit produces more pulses at the output then it uses from the input. This circuit performs so called "Frequency multiplication process". The circuit diagram is shown in Figure below.

Digital frequency multiplier circuit

DD1 - 74121; DD2 - 7490; DD3 - 7400; VD1,VD2 - 1N4148; C1 - 10pF; C2, C3 - 1nF; R1 - 2K; R2, R3 - 10K

The input pulses Uin going to the one-shot circuit DD1 that composed of the monostable multivibrator 74121. DD1 produces positive short pulses at its output 6 (this is the non-inverting output), the width of this pulses is independent of the width of input pulses Uin. The width of pulses at the output of the monostable multivibrator 74121 is determined by the capacitor C1, resistor R1 and internal resistance of the circuit 74121 (it is about 2 kohms). This pulses follow with the same time interval as the time interval of input pulses.

The short pulses from the output of the monostable multivibrator DD1 go to the counter DD2 and resets it to zero. Now its outputs F0-F3 is low, and the output of DD3.3 is high (the switch SA1 can be in any position). When the upper input of the gate DD3.4 is high then the signal (a pack of pulses) from the oscillator (gates DD3.1, DD3.2 forms a multivibrator circuit) will pass from the other input of the gate DD3.4 to its output. From the output of the gate DD3.4 the pulses go to the input of the counter DD2 (the pin 14). When the input of the gate D3.3 is high, then the pulses couldn't pass to the output of DD3.4. Its depends on the position of the switch SA1. In the position 1 ("x2") the high level at the input of the gate D3.3 will appear after two pulses come to the input of the counter DD2, so the circuit will multiply input pulses in two times, in the position 2 ("x4") - in four times, and in the position 3 ("x8") - in eight times.

This frequency multiplier will work properly when the frequency of the multivibrator circuit (gates DD3.1, DD3.2) is in 10 or more times higher than the input frequency. With the parameters of capacitors and resistors (C1 = 10pF; C2, C3 = 1nF; R1 = 2K; R2, R3 = 10K) used in this circuit diagram the frequency of the multivibrator circuit is 100 kHz, therefore the input frequency should not exceed 10 kHz. Because of a delay in the monostable multivibrator DD1 the pulses at its output is slightly delayed compared with the pulses on the input of this integrated circuit. To reduce this delay it takes to reduce the value of the resistor R1, but this value should not be less then 1 khom.

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