Radio, 1983, 11
By using the reverse binary counter and the binary-coded decimal decoder can obtained the step voltage, and by approximating this voltage can be produced the sine wave signal with sufficient accuracy, suitable for many purposes.
In the circuit diagram of the digital generator (see figure 1) the resistors R1..R9 is used to produce the first quarter of the sine wave (while the reverse counter D2 has normal counting mode) as the current, applied to the inverting input of the summing operational amplifier A1. The trigger, composed of the two logic gates D1.3 and D1.4 will be switched when the outputs "0" or "9" of the decoder D3 changes to logic zero, this trigger controls the mode (reverse or normal) of the reverse counter. Thus, for twenty clock ticks at the input of the generator, the output of the summing amplifier A1 will create the positive half-wave sine wave.
The negative half-wave will be formed within the next twenty cycles by inverting the positive half-wave with the amplifier A2, which operates alternately (the first 20 cycles the amplifier A2 works as the non inverter, the next 20 cycles it works as the inverter). The gain of the amplifier switches by the FET transistor V4 from -1 to +1. The signal from the output of RS flip-flop (D1.3, D1.4) feeds through the D flip-flop D6 and the zener diode V1 to the transistors V1 and V2 (level shifting circuit) and further on the gate of the FET transistor V4.
Fig. 1. The circuit diagram of the digital sine-wave generator.
The voltage taken from the wiper of potentiometer R13, is adjusted to get zero voltage at output of the summing amplifier A1 while all outputs of the counter D2 has logic zero.
The output frequency of the sine wave is 40 times less than the frequency of the input clock ticks. The amplitude of the output voltage is 6 V.
Wireless world, 1981, Vol. 1544