FM detector with PLL for a direct-conversion receiver

FM detectors of direct-conversion receivers have to meet some controversial requirements. The detector should have high sensitivity, and selectivity should be as good as possible, because it determines the selectivity of the receiver. Moreover, the receiver has to work reliably even if an input signal changes in a wide range, and as it is known, PLL parameters are depend on the input signal level (see the article "Characteristics of FM demodulators with PLL", "Radio", 1978, 9, pp. 37-39).

A PLL system without filter provides wide bandwidth for output signals, but it has a low selectivity. A PLL system with proportionally-integrating filter can provide either improved selectivity (if the cutoff frequency of the filter matches with the bandwidth of the loop) or wide bandwidth for signals (at high levels), but low selectivity. A PLL system with integrating filter provides as high as possible selectivity, but at high level signals there is an undesirable rise in frequency response at frequencies of tens to hundreds of kilohertz. The rise induces self-oscillation of the system if the bandwidth is limited. Although it occurs at ultrasound frequencies, the self-oscillation modulates the local oscillator, therefore the local oscillator will produce other frequencies, and the receiver will receive multiple channels simultaneously. Moreover, it may lead to nonlinear distortion because of the DC amplifier saturation.

There are two ways to solve the problem - stabilize the input signal at some level, or synthesize loop parameters that allow to operate in wide signal range.

A block diagram of the receiver with a synchronous detector

A radio frequency (RF) amplifier with automatic gain control (AGC) can be used to stabilize the input signal level. But in the loop of PLL there is no voltage that is proportional only to the amplitude of the input signal - if local oscillator and input signal frequencies are matched, the error voltage at the output of DC amplifier is zero. Therefore, to get the AGC voltage, it takes to add an additional channel to the receiver. The block diagram of the receiver, based on this principle, is shown on the Figure 1. This is the block diagram of the receiver with synchronous demodulator, that tracking both frequency and amplitude of the input RF signal.

Block diagram of the direct-conversion receiver with a synchronous detector

Figure 1

The RF amplifier A1 amplifies the input signal, and the signal feeds to mixers of each channel. The frequency tracking channel comprises mixer U1, filter Z1 of the feedback loop, DC amplifier A2 and varicap V1. The varicap tunes the local oscillator G1. The local oscillator signal goes through the phase shifter, it shifts the signal phase by 90° between signals that feed to mixers. In case of using antiparallel diode mixer with FS - 2FLO, the phase shift is 45°. If the signal is locked, the phase shift in the loop between RF and local oscillator signals is 90° at the mixer U1. In this case, phases of RF and local oscillator signals of the amplitude tracking channel are phase-matched, therefore a DC voltage appears at the mixer output. The DC voltage is proportional to the RF signal amplitude. This voltage passes through the filter Z2 and it amplifies by the DC amplifier A3, then it fed to AGC detector E1, it controls the gain of the RF amplifier A1.

For FM reception it's better make both channels identical. AGC detector can be built by a common diode circuit, but without decoupling capacitor, to allow the AGC system to work in beat frequency mode, i.e. before locking the frequency, and also in tracking mode, when there is a DC voltage in the amplitude tracking channel. Of course, blocks U2 and Z2 should be made without decoupling capacitors. The output of the AGC detector should be connected to an RC network with the time constant of 0.05...0.1 second.

A receiver build on that principle can receive long, middle and short wave AM radio stations. The PLL system should have quite slow response time, the bandwidth of several Hz. The cutoff frequency of Z2 should be about 3...8 kHz.

The receiver with a synchronous detector can have very high reception characteristics for AM and FM radio stations. If use a low-pass filter for AM reception, the receiver can provide a selectivity as good as a receiver with the crystal filter. Distortion caused by RF signal fading is almost eliminated, because of the local oscillator voltage at the mixer U2. This voltage serves as a carrier, and its value is much higher than RF signal level. Because of the AGC that maintains the signal level, an integrating filter with cutoff frequency of 15 kHz (this is the upper modulation frequency) can be used in the loop for FM radio station reception. The bandwidth should be about 20...30 kHz, it provides high selectivity for the receiver. A small rise in frequency response at higher frequencies can be compensated by connecting an RC network to the detector output. The tracking range can be extended by using a proportionally-integrating network.

PLL system with a linear characteristic of the filter

Let's consider another way to create an FM direct-conversion receiver that can work with wide input signal range by optimizing the loop of PLL, without AGC or any other system. Analyze of open and closed loops described in the article mention above, led to a conclusion that a maximum roll-off rate of the integrating filter in the loop is 20 dB/decade, and the steepness of the open loop characteristic is 40 dB/decade (line 1 on the Figure 2). In this case the system is on the verge of stability, i.e. the rise in frequency response tends to infinity. The bandwidth is corresponding to the point where line 1 crosses the horizontal axis. If the signal level changes, (the horizontal axis moves), the bandwidth changes just a little bit. A minimal possible gain slope of the loop characteristic is 20 dB/decade, it corresponds to a PLL system without filter (line 2 on the Figure 2). In this case the bandwidth changes in linear ratio to the signal level, and the selectivity is very poor. A direct-conversion receiver with these parameters is not a good thing - it is unstable or it has a low selectivity. It's not good if the loop characteristic has sharp bends, because if signal level changes (in a moment when the signal level crosses a sharp bend), the shape of the frequency response also changes.

PLL system characteristic of the open loop

Figure 2

A frequency response of an open loop of PLL with the linear characteristic has been calculated. The frequency response curve is located between lines 1 and 2, it takes a more complicated circuit than a simple RC network to create a system with these parameters. The characteristic 3 in the figure 2 has the steepness of 34 dB per decade, the steepness of the characteristic 4 is 30 dB/decade. Therefore the parameters of the integrating filter in the loop should have steepness of 14 dB and 10 dB per decade. The phase shift of the filter with linear characteristic is -90° per 20 dB/decade. The phase shift for lines 1, 2, 3 and 4 is respectively -150° (the system unstable), -90°, -153° and -135°. The phase stability margin for lines 3 and 4 is 27° and 45° respectively. Therefore, the system with these parameters is stable.

Precalculated characteristics KL of F/FU for a close loop with linear characteristics 3 and 4 are shown in the Figure 3. If a signal level changes, the shape of this curves remains the same, but the bandwidth increases. The rise of high frequencies is 7 dB for the 34 dB/decade curve, and only 2.2 dB for the 30 dB/decade curve. The selectivity of this PLL system is worse than the system with the integrating filter, but it is better than the system without filter or the system with proportionally-integrating filter.

Precalculated characteristics for a close loop system

Figure 3

Synthesis of a linear cutoff filter

It is possible to create a filter with the cutoff steepness of 10..14 dB/decade by connecting proportional-integrating networks in series (see the Figure 4, A). This networks should provide a staircase - like curve (see the Figure 5). The parameter m should be higher than the step of the sequence FC1/FC2=FC2/FC3=...), and horizontal parts of the curve should be followed by slope parts of the curve. It is possible to get characteristics with a slope in range from 0 to 20 dB per decade by changing m parameter. The number of filter elements can be reduced by combining series-connected resistors and changing values of parallel-connected resistors (see the Figure 4, B). Networks R1C1, R2C2 etc., are connected in the feedback of an operational amplifier with the gain of K0, allow to reduce values of these RC components in K0 times. The real frequency response of the filter will have a quite smooth shape if the step is not too large. RC networks will make the shape smoother.

Proportional-integrating networks

Figure 4

Staircase - like curve

Figure 5

A real circuit of the FM demodulator

A frequency response of the FM detector based on a staircase filter with a slope of 30 dB/decade is shown in the Figure 6. The cutoff frequency of the first stage is 1 kHz for bandwidth of 12.5 kHz and locking range of 50 kHz, at the minimum ("zero") signal level. The linear shape of the filter frequency response is achieved by approximation of three stages with m=0.1 and the 10 times frequency step. That makes the frequency response equal to 60 dB (1000 times) by frequency, and equal to 90 dB by amplitude. At frequencies higher than 300 kHz the filter frequency response has a slightly sloping part (a-b span on the Figure 6). The slightly sloping part is necessary for compensating stray capacitances and resistances of the amplifier, phase detector and control network. Stray capacitances and resistances make the sloping part of the frequency response is more steep (see the Figure 6, c-d). The input signal range of the such design is more than 60 dB, it depends on stray parameters. For the stereo reception the input signal level should be increased for 18 dB, then the bandwidth is 50 kHz and the locking range is 400 kHz.

A frequency response of the FM detector

Figure 6

If the locking range FLR is equal to the frequency deviation of FM signal (0.05 MHz), the gain of the phase detector Kd=0.35, the gain of DC amplifier K0=700 and the steepness of the controlling component q=1 MHz/V. The sensitivity of the detector for mono signal can be calculated with the next formula:

US=FLR/(Kd*K0*q) = 0.05/(0.35*700*1)=200 μV

The maximum input signal level is more than enough - it is 0.1 V. For such the signal range it is makes sense to use an RF amplifier with AGC. Of course the RF amplifier should be tunable. The amplifier should have the Q-factor of 70...100, it allows to get the bandwidth no more than 0.7...1 MHz. For high signal levels the locking range can be limited by connecting an anti-parallel diode limiter between the DC amplifier and the varicap. The limiter limits voltage to 0.5...1 Volts. With the exact tuning to a radio station, the limiter doesn't affect the system, because the audio signal at the detector output equal to ΔF/q, its voltage is less than 0.05 V.

FM direct-conversion receiver circuit

The circuit diagram is shown in Figure 7. The RF signal from antenna (or from an RF amplifier) goes to the resonant tank L1C1, it is tuned to the middle frequency (66..73 MHz) of the radio broadcast band (this is the OIRT band), then the signal goes farther to the antiparallel mixer with diodes V1, V2. The local oscillator voltage (33...36.5 MHz) goes from the coupling coil L3, then through the capacitors C2, C3 to the mixer diodes. The trimming resistor R1 is used to balance the mixer and the amplifier. The staircase filter is based on R3, R5C8, R6C9, R7C10. The filter is included into the amplifier feedback network. The voltage controlled local oscillator circuit is designed using transistor V3. Varicaps V4 and V5 are used for tuning and frequency control respectively. The network R10C13 is connected to the output of the demodulator to correct pre-emphasis. Coils L1 and L2 are wound on formers of 8 mm diameter with ferrite slugs, using enameled copper wire with the diameter of 0.8 mm (AWG 20). L1 has 5 turns, L2 - 8 turns, they are tapped at the second turn. The coil L3 is wound over L2, it has 2 turns of enameled copper wire with the diameter of 0.2 mm (AWG 32).

FM direct-conversion receiver circuit

Figure 7

V1, V2 - KD503A (1N4148);

V3 - GT311B (the germanium USSR transistor) ft = 300 MHz, hFE = 30...180;

V4, V5 - D901A (varicaps) C = 22...32 pF at 4 Volts reverse voltage,
C(V1)/C(V2)=3.6...4.4 at V1=4V, V2=80V

A1 - 140UD1A (μA702);

R1 - 220 Ω; R2, R8 - 150 Ω; R3 - 1k; R4, R9 - 3.9k; R5 - 680 Ω;
R6 - 6.8k; R7 - 68k; R10 - 5.1k; R11 - 22k; R12 - 100k;

C1 - 24 pF; C2, C3 - 75 pF; C4, C7, C11 - 33 nF;
C5, C6 - 91 pF; C8 - 24 pF; C9 - 75 pF; C10 - 200 pF;
C12, C15 - 30 μF x 12 V; C13 - 10 nF; C14 - 20 μF x 12 V;

L1 and L2 are wound on formers of 8 mm diameter with ferrite slugs;
L1 - 5 turns, L2 - 8 turns, both coils are tapped at the second turn;
the enameled cooper wire is 0.8 mm (AWG 20);
L3 is wound over L2, it has 2 turns of enameled copper wire
with the diameter of 0.2 mm (AWG 32);

L1C1 circuit is about 70 MHz;
L2C6 circuit is about 35 MHz.

To adjust the detector, it takes to tune resonant tanks to their proper frequencies (F and F/2 respectively), and balance the detector using the trimming potentiometer R1. The local oscillator voltage at the mixer should be adjusted by matching values of C2 and C3 or by changing number of turns of the coupling coil L3. The feedback in the local oscillator circuit should be as small as it possible, it can be adjusted by matching the tap point of the coil L2. The minimum feedback reduced the second harmonic of the local oscillator signal, therefore it improves balancing of the DC amplifier.

V. Polyakov
"Radio" 1978, 11